Verific Design Automation, with offices in Kolkata, India, and Alameda, CA,
was founded in 1999 by EDA industry veteran Rob Dekker. Prior to founding
Verific, Dekker was a software developer, manager, and director at Exemplar
Logic. A leading provider of VRLG and VHDL front-ends, Verific's software is
used worldwide in synthesis, simulation, formal verification, emulation,
debugging, virtual prototyping, and design-for-test applications, which
combined have shipped over 40,000 copies.