Included files associated with a Verilog source file

Q: How do I get the list of included files associated with a Verilog source file?

The main utility you require is:

   static Map *veri_file::GetIncludedFiles() ;

It returns a (static) Map *. The map is hashed with char *name of the `include file and the value is the linefile_type from where it was included. Code sample:

   const char *source_file = .... ; // The RTL source file name
   // Find the file-id for linefile object of this file:
   unsigned file_id = LineFile::GetFileId(source_file);
   // Get the name of all the include files:
   const Map *all_include_files = veri_file::GetIncludedFiles();
   MapIter mi ;
   const char *include_file ;
   linefile_type source_linefile ;
   // Now traverse the Map to find the include files for this file-id:
   FOREACH_MAP_ITEM(all_include_files, mi, &include_file, &source_linefile) {
      if (LineFile::GetFileId(source_linefile) == file_id) {
          // Here we found a `include file "include_file" from "source_file"
          // Do what you want to do here... 
       }
   }