Difference between revisions of "Main Page"

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* [[Output file formats | What language formats does Verific support as output?]]
 
* [[Output file formats | What language formats does Verific support as output?]]
  
'''TCL, Perl, Python, Java'''
+
'''Scripting languages: TCL, Perl, Python'''
 
* [[What languages can I use with Verific software? | What programming languages can I use with Verific software?]]
 
* [[What languages can I use with Verific software? | What programming languages can I use with Verific software?]]

Revision as of 16:48, 21 February 2019

General

Input: VHDL, Verilog (and SystemVerilog), Liberty, EDIF

Netlist Database

Output

Scripting languages: TCL, Perl, Python