Difference between revisions of "Simple example of visitor pattern"

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(Created page with " <nowiki> $ cat test.cpp #include <iostream> #include "veri_file.h" #include "VeriModule.h" #include "VeriVisitor.h" #include "VeriConstVal.h" #include "Strings.h" #ifdef V...")
 
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Example 1:
 
  <nowiki>
 
  <nowiki>
 
$ cat test.cpp
 
$ cat test.cpp
 
#include <iostream>
 
#include <iostream>
 
 
#include "veri_file.h"
 
#include "veri_file.h"
 
#include "VeriModule.h"
 
#include "VeriModule.h"
 
#include "VeriVisitor.h"
 
#include "VeriVisitor.h"
 
#include "VeriConstVal.h"
 
#include "VeriConstVal.h"
 
 
#include "Strings.h"
 
#include "Strings.h"
  
Line 52: Line 51:
 
test.v(2): INFO: Got expression: 2.6
 
test.v(2): INFO: Got expression: 2.6
 
test.v(3): INFO: Got expression: 2'b0
 
test.v(3): INFO: Got expression: 2'b0
 +
 +
$
 +
</nowiki>
 +
Example 2:
 +
<nowiki>
 +
$ cat test.cpp
 +
#include <iostream>
 +
#include "veri_file.h"
 +
#include "VeriModule.h"
 +
#include "VeriVisitor.h"
 +
#include "VeriExpression.h"
 +
#include "VeriId.h"
 +
#include "Strings.h"
 +
 +
#ifdef VERIFIC_NAMESPACE
 +
using namespace Verific ;
 +
#endif
 +
 +
class MyVisitor : public VeriVisitor
 +
{
 +
public:
 +
    MyVisitor() : VeriVisitor() { }
 +
    virtual ~MyVisitor() { }
 +
 +
    virtual void VERI_VISIT(VeriBindDirective, node)
 +
    {
 +
        char *str = node.GetPrettyPrintedString() ;
 +
        std::cout << "    bind directive: " << str;
 +
        Strings::free(str) ;
 +
        VeriModuleItem *verimoduleitem = node.GetInstantiation();
 +
        if (verimoduleitem->IsInstantiation()) {
 +
            VeriModuleInstantiation *instantiation = static_cast <VeriModuleInstantiation *>(verimoduleitem);
 +
            str = instantiation->GetPrettyPrintedString() ;
 +
            std::cout << "        instantiation: " << str ;
 +
            VeriModule *mod = instantiation->GetInstantiatedModule();
 +
            if (mod) {
 +
                std::cout << "            instantiated module: " << mod->Name() << "\n";;
 +
            }
 +
            Array *ids = instantiation->GetIds();
 +
            unsigned i;
 +
            VeriInstId *instid;
 +
            FOREACH_ARRAY_ITEM (ids, i, instid) {
 +
                std::cout << "            instance name: " << instid->Name() << "\n";;
 +
            }
 +
            Strings::free(str) ;
 +
        }
 +
        Array *target_inst_list = node.GetTargetInstanceList();
 +
        unsigned i;
 +
        VeriExpression *target_instance ;
 +
        FOREACH_ARRAY_ITEM(target_inst_list, i, target_instance) {
 +
            if (!target_instance) continue ;
 +
            char *str = target_instance->GetPrettyPrintedString() ;
 +
            std::cout << "        target_instance: " << str;
 +
            Strings::free(str) ;
 +
            std::cout << "\n";
 +
        }
 +
    }
 +
} ;
 +
 +
int main(int argc, char **argv)
 +
{
 +
    if (!veri_file::Analyze("test.v", veri_file::SYSTEM_VERILOG)) return 1 ;
 +
 +
    MyVisitor mv ;
 +
 +
    MapIter mi ;
 +
    VeriModule *mod ;
 +
    FOREACH_VERILOG_MODULE(mi, mod) if (mod) mod->Accept(mv) ;
 +
 +
    return 0 ;
 +
}
 +
 +
$ cat test.v
 +
module test;
 +
  sub inst();
 +
endmodule
 +
 +
module foo;
 +
endmodule
 +
 +
bind test.inst foo i_foo(.*);
 +
 +
$ test-linux
 +
-- Analyzing Verilog file 'test.v' (VERI-1482)
 +
    bind directive: bind test.inst foo i_foo (.* ) ;
 +
        instantiation: foo i_foo (.* ) ;
 +
            instantiated module: foo
 +
            instance name: i_foo
 +
        target_instance: test.inst
  
 
$
 
$
 
  </nowiki>
 
  </nowiki>

Revision as of 11:01, 21 April 2021

Example 1:

$ cat test.cpp
#include <iostream>
#include "veri_file.h"
#include "VeriModule.h"
#include "VeriVisitor.h"
#include "VeriConstVal.h"
#include "Strings.h"

#ifdef VERIFIC_NAMESPACE
using namespace Verific ;
#endif

class MyVisitor : public VeriVisitor
{
public:
    MyVisitor() : VeriVisitor() { }
    virtual ~MyVisitor() { }

    virtual void VERI_VISIT(VeriConst, node)
    {
        char *str = node.GetPrettyPrintedString() ;
        node.Info("Got expression: %s", str) ;
        Strings::free(str) ;
    }
} ;

int main(int argc, char **argv)
{
    if (!veri_file::Analyze("test.v")) return 1 ;

    MyVisitor mv ;

    MapIter mi ;
    VeriModule *mod ;
    FOREACH_VERILOG_MODULE(mi, mod) if (mod) mod->Accept(mv) ;

    return 0 ;
}

$ cat test.v
module test ;
    (* a = 1, b = 2.6 *) wire w ;
    assign w = 2'b00 ;
endmodule

$ test-linux
-- Analyzing Verilog file 'test.v' (VERI-1482)
test.v(2): INFO: Got expression: 1
test.v(2): INFO: Got expression: 2.6
test.v(3): INFO: Got expression: 2'b0

$
 

Example 2:

$ cat test.cpp
#include <iostream>
#include "veri_file.h"
#include "VeriModule.h"
#include "VeriVisitor.h"
#include "VeriExpression.h"
#include "VeriId.h"
#include "Strings.h"

#ifdef VERIFIC_NAMESPACE
using namespace Verific ;
#endif

class MyVisitor : public VeriVisitor
{
public:
    MyVisitor() : VeriVisitor() { }
    virtual ~MyVisitor() { }

    virtual void VERI_VISIT(VeriBindDirective, node)
    {
        char *str = node.GetPrettyPrintedString() ;
        std::cout << "    bind directive: " << str;
        Strings::free(str) ;
        VeriModuleItem *verimoduleitem = node.GetInstantiation();
        if (verimoduleitem->IsInstantiation()) {
            VeriModuleInstantiation *instantiation = static_cast <VeriModuleInstantiation *>(verimoduleitem);
            str = instantiation->GetPrettyPrintedString() ;
            std::cout << "        instantiation: " << str ;
            VeriModule *mod = instantiation->GetInstantiatedModule();
            if (mod) {
                std::cout << "            instantiated module: " << mod->Name() << "\n";;
            }
            Array *ids = instantiation->GetIds();
            unsigned i;
            VeriInstId *instid;
            FOREACH_ARRAY_ITEM (ids, i, instid) {
                std::cout << "            instance name: " << instid->Name() << "\n";;
            }
            Strings::free(str) ;
        }
        Array *target_inst_list = node.GetTargetInstanceList();
        unsigned i;
        VeriExpression *target_instance ;
        FOREACH_ARRAY_ITEM(target_inst_list, i, target_instance) {
            if (!target_instance) continue ;
            char *str = target_instance->GetPrettyPrintedString() ;
            std::cout << "        target_instance: " << str;
            Strings::free(str) ;
            std::cout << "\n";
        }
    }
} ;

int main(int argc, char **argv)
{
    if (!veri_file::Analyze("test.v", veri_file::SYSTEM_VERILOG)) return 1 ;

    MyVisitor mv ;

    MapIter mi ;
    VeriModule *mod ;
    FOREACH_VERILOG_MODULE(mi, mod) if (mod) mod->Accept(mv) ;

    return 0 ;
}

$ cat test.v
module test;
  sub inst();
endmodule

module foo;
endmodule

bind test.inst foo i_foo(.*);

$ test-linux
-- Analyzing Verilog file 'test.v' (VERI-1482)
    bind directive: bind test.inst foo i_foo (.* ) ;
        instantiation: foo i_foo (.* ) ;
            instantiated module: foo
            instance name: i_foo
        target_instance: test.inst

$