Difference between revisions of "What VeriModule* or VhdlPrimaryUnit* the Netlist comes from?"

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There are "system" attributes attached to the Netlist that you may find useful. Note the leading space:
 
There are "system" attributes attached to the Netlist that you may find useful. Note the leading space:
  
:key: " language", value: one of "vhdl", "verilog", "edif", "synlib".
+
:key: " language" - value: one of "vhdl", "verilog", "edif", "synlib".
:key: " cell_name", value: original module/unit name.  
+
:key: " cell_name" - value: original module/unit name.  
  
 
See also Netlist::CellBaseName().
 
See also Netlist::CellBaseName().
  
 
Once you get the original name of the module/unit, you can search the parse tree for it.
 
Once you get the original name of the module/unit, you can search the parse tree for it.

Latest revision as of 13:40, 6 May 2020

Q: For a Netlist in the netlist database, is there a clean way to look back at what VeriModule* or VhdlPrimaryUnit* the Netlist was derived from?

For example, a module:

   module mod();
   parameter WIDTH=2;
   ...
   endmodule

would elaborate to a netlist name \mod(WIDTH=2) or if instantiated with a different width \mod(WIDTH=4)

There are "system" attributes attached to the Netlist that you may find useful. Note the leading space:

key: " language" - value: one of "vhdl", "verilog", "edif", "synlib".
key: " cell_name" - value: original module/unit name.

See also Netlist::CellBaseName().

Once you get the original name of the module/unit, you can search the parse tree for it.