Design with VHDL-1993 and VHDL-2008 files

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Q: VHDL-1993 and VHDL-2008 each has its own IEEE set. How do I analyze/elaborate a design with a mixture of files of different VHDL dialects (1993 and 2008)?

Please load the 2008 version of the IEEE library distributed by Verific and then analyze the 1993 and 2008 design files in their proper dialect. Verific will internally adjust the packages and both the designs should compile without any errors. For example:

   setvhdllibrarypath -default verific_source/vhdl_packages/vdbs_2008
   analyze test93.vhdl
   analyze -vhdl_2008 test2008.vhdl

For more details, see