User contributions
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- 17:13, 1 March 2019 (diff | hist) . . (+4,987) . . N Process -f file and explore the Netlist Database (py) (Created page with " <nowiki> #!/usr/bin/python import sys import re sys.path.append('../../../pythonmain/install') import Verific def Accumulate(netlist,done): if not netlist: retu...")
- 17:12, 1 March 2019 (diff | hist) . . (+4) . . Main Page
- 17:12, 1 March 2019 (diff | hist) . . (+131) . . Main Page
- 17:08, 1 March 2019 (diff | hist) . . (+6,847) . . N Process -f file and explore the Netlist Database (Created page with "C++: <nowiki> #include "Map.h" // Make associated hash table class Map available #include "Array.h" // Make associated hash table class Array available #include...") (current)
- 17:07, 1 March 2019 (diff | hist) . . (+128) . . Main Page
- 17:05, 1 March 2019 (diff | hist) . . (+21) . . Main Page
- 16:19, 1 March 2019 (diff | hist) . . (-142) . . Main Page
- 16:18, 1 March 2019 (diff | hist) . . (+3,375) . . N Create a Netlist Database from scratch (not from RTL elaboration) (Created page with " <nowiki> #!/usr/bin/perl use strict; push (@INC,"../../../extra_tests/pm"); require "Verific.pm"; # The global Libset is already at the top of the netlist database. # No ne...")
- 16:18, 1 March 2019 (diff | hist) . . (+150) . . Main Page
- 16:14, 1 March 2019 (diff | hist) . . (+2,074) . . N Pretty-print a module and the packages imported by the module (Created page with "C++: <nowiki> #include <iostream> #include <fstream> #include "veri_file.h" #include "VeriModule.h" #include "VeriId.h" #include "VeriScope.h" #include "Set.h" using names...")
- 16:12, 1 March 2019 (diff | hist) . . (+147) . . Main Page
- 16:02, 1 March 2019 (diff | hist) . . (+2,173) . . N Retrieve package name for user-defined variable types (Created page with "C++ source: <nowiki> #include <iostream> #include "veri_file.h" #include "VeriModule.h" #include "VeriVisitor.h" #include "VeriExpression.h" #include "VeriId.h" using name...")
- 15:50, 1 March 2019 (diff | hist) . . (+131) . . Main Page
- 14:08, 1 March 2019 (diff | hist) . . (+1,722) . . N Extract clock enable (Created page with "Here is a small example which will extract clock-enables for every DFF in the design. It uses both CheckDriverFrom() (to check if there is any potential clock-enable) as well...") (current)
- 14:04, 1 March 2019 (diff | hist) . . (+70) . . Main Page
- 13:54, 1 March 2019 (diff | hist) . . (+3,299) . . N Write out an encrypted netlist (Created page with " <nowiki> #include <iostream> #include <cstring> #include "veri_file.h" #include "DataBase.h" #include "VeriWrite.h" #include "Strings.h" #include "Message.h" #include "Pro...") (current)
- 13:51, 1 March 2019 (diff | hist) . . (+70) . . Main Page
- 13:46, 1 March 2019 (diff | hist) . . (+21) . . Main Page
- 13:40, 1 March 2019 (diff | hist) . . (+14) . . Prettyprint to a string (current)
- 16:18, 28 February 2019 (diff | hist) . . (+1) . . Prettyprint to a string
- 16:17, 28 February 2019 (diff | hist) . . (+64) . . Prettyprint to a string
- 14:11, 28 February 2019 (diff | hist) . . (-8) . . Prettyprint to a string
- 14:10, 28 February 2019 (diff | hist) . . (+5) . . Main Page
- 14:09, 28 February 2019 (diff | hist) . . (+145) . . Prettyprint to a string
- 14:07, 28 February 2019 (diff | hist) . . (0) . . Prettyprint to a string
- 11:46, 27 February 2019 (diff | hist) . . (+258) . . Tcl library path
- 16:48, 21 February 2019 (diff | hist) . . (+15) . . Main Page
- 16:48, 21 February 2019 (diff | hist) . . (-6) . . What languages can I use with Verific software? (current)
- 15:30, 15 February 2019 (diff | hist) . . (+964) . . N Cross-reference between the original RTL files and the elaborated netlist (Created page with "'''Q: Is there a cross-reference between the original RTL design files and the elaborated netlist? We need this for our application. If any issue found in the elaborated netli...") (current)
- 15:19, 15 February 2019 (diff | hist) . . (+197) . . Main Page
- 11:52, 12 February 2019 (diff | hist) . . (+11) . . Design with System Verilog and Verilog 2001 files (current)
- 11:47, 12 February 2019 (diff | hist) . . (+19) . . m Main Page
- 17:41, 28 December 2018 (diff | hist) . . (+1,087) . . Top level module with interface ports (current)
- 17:27, 28 December 2018 (diff | hist) . . (+1,706) . . N Defined macros become undefined - MFCU vs SFCU (Created page with "'''Q: I have macros defined in a separate input file. Why does Verific analyzer complain about "undefined macros" in SystemVerilog mode but not in Verilog 2K mode?''' SystemV...")
- 17:13, 28 December 2018 (diff | hist) . . (+1) . . Main Page
- 17:12, 28 December 2018 (diff | hist) . . (+157) . . Main Page
- 17:04, 28 December 2018 (diff | hist) . . (+24) . . Main Page
- 16:19, 28 December 2018 (diff | hist) . . (+851) . . N Top level module with interface ports (Created page with "'''Q: How to elaborate top-level module with interface ports.''' When I elaborate a top-level module with interface ports, Verific issues a warning message and stops the elab...")
- 14:07, 28 December 2018 (diff | hist) . . (+120) . . Main Page
- 10:30, 26 November 2018 (diff | hist) . . (-773) . . Talk:Main Page (Blanked the page) (current)
- 12:26, 11 September 2018 (diff | hist) . . (+119) . . Does Verific support XMR?
- 11:58, 31 August 2018 (diff | hist) . . (+54) . . Support IEEE 1735 encryption standard
- 18:03, 30 August 2018 (diff | hist) . . (+678) . . N Support IEEE 1735 encryption standard (Created page with "'''Q:Does Verific provide support for IEEE 1735 encryption standard?''' Verific does not implement the decryption/encryption algorithms. This task is appropriately reserved t...")
- 18:00, 30 August 2018 (diff | hist) . . (+111) . . Main Page
- 17:11, 24 August 2018 (diff | hist) . . (+20) . . How to get type/initial value of parameters
- 17:10, 24 August 2018 (diff | hist) . . (+3) . . How to ignore parameters/generics in elaboration
- 17:10, 24 August 2018 (diff | hist) . . (+11) . . How to create a Netlist database from scratch (not from RTL input) (current)
- 17:09, 24 August 2018 (diff | hist) . . (+20) . . How to ignore parameters/generics in elaboration
- 17:01, 24 August 2018 (diff | hist) . . (+3,381) . . N How to create a Netlist database from scratch (not from RTL input) (Created page with "A Perl example: <nowiki> #!/usr/bin/perl use strict; push (@INC,"../../../extra_tests/pm"); require "Verific.pm"; # The global Libset is already at the top of the netlist...")
- 17:00, 24 August 2018 (diff | hist) . . (+142) . . Main Page
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