We used Verific’s thoroughly tested parsers and were able to focus on developing Prospect.
Vtool
Verific parsers easily integrated with our functional verification platform, saving us time and resources.
HDL Works
We chose to purchase software from Verific Design Automation for reasons of product quality and time to market.
NEC Research
Using Verific’s software fits right into our best-in-class strategy.
Sequence
We replaced our existing Verilog and VHDL parsers and elaborator with Verific’s solution.
- « Previous Page
- 1
- 2
- 3
- 4
- 5
- …
- 8
- Next Page »