Verific Design Automation

  • Home
  • Products
  • Downloads
  • News
  • Testimonials
  • About Verific
  • Contact us

26 October 2022

Bespoke Silicon Requires Bespoke EDA

Michiel Ligthart on 10-26-2022

When I first heard the term ‘bespoke silicon,’ I had to get my dictionary out. Well versed in the silicon domain, I did not know what bespoke meant. It turns out to be a rather old-fashioned term for tailor made and seems to be very much British English. The word dates from 1583 and is the past participle of bespeak, according to the Oxford English Dictionary. American English by contrast more commonly uses the word custom. By now, custom silicon has been rebranded to bespoke silicon.

Read more.

Filed Under: Geen categorie

25 August 2022

Verific’s Rick Carlson Appointed Advisory Board Member for the College of Computing at Illinois Institute of Technology

Illinois Institute of Technology (Illinois Tech) alumnus Rick Carlson (MATH ’70), vice president of sales for Verific Design Automation, a leading provider of SystemVerilog, Verilog, VHDL, and UPF Parser Platforms, has been elected to the College of Computing Board of Advisors.

Read More.

Filed Under: Geen categorie

8 July 2022

DAC 2022 preview: Verific Design Automation

Verific Design Automation, the tool development specialist, and its R&D and applications staff will be at the exhibition during the Design Automation Conference (DAC) in San Francisco next week (Booth #1415).

Read more.

Filed Under: Geen categorie

9 June 2022

Four ways to build a CAD flow: In-house design to custom-EDA tool

An internal computer aided design (CAD) or design services engineer is responsible for delivering efficient, robust and high-quality design flow solutions. The design flow on a day-to-day basis keeps chip designers and verification engineers productive and focused on their jobs, preventing them from debugging CAD tools and flows and creating ad hoc and undocumented scripts. Over the life of a project, a high-quality design flow differentiates a company from competitors and can be the difference between getting chips to market first or being the victim of unexpected process bottleneck and delays.

Read more.

Filed Under: Geen categorie

16 February 2022

Verific Sharpening the Saw

Verific is an unusual company. They are completely dominant in what they do – providing parsers for Verilog/SV, VHDL and UPF. Yet they have no ambition to expand beyond that goal. Instead, per Michiel Ligthart (President and COO), they continue to “sharpen the saw”. This is an expression I learned in sales training, habit #7 from 7 Habits of Highly Effective People. Constantly refining and polishing (or sharpening) the tools you already have rather than launching out into building new tools. That’s a great way to keep existing customers loyal and to steadily grow a business. They are still investing in interesting development, but it is all around these core tools.

Read More.

Filed Under: Geen categorie

16 February 2022

Rapid Silicon Chooses Verific’s Industry-Standard Parser Platform

Verific Design Automation, the leading provider of SystemVerilog, Verilog, VHDL and UPF Parser Platforms, today announced Rapid Silicon, a provider of AI-enabled application-specific FPGAs based on open-source technology, is the newest licensee of its Parser Platform.

Read More.

Filed Under: Geen categorie

24 December 2021

Parser platform lets designers innovate

To gain at least an 18 month advantage in getting a product to market, Verific Design Automation builds SystemVerilog, UPF and VHDL parser platforms which accelerates the production cycle because the RTL front end is immediately accepted by the semiconductor industry, says the company.

Read More.

Filed Under: Geen categorie

2 November 2021

Playing to Your Company’s Strength to be Strategic, Differentiated, Competitive

Michiel Ligthart | President and COO | Verific Design Automation

Conventional career advice favors “playing to your strength,” guidance executives at Apple, Amazon, Facebook, Microsoft and Tesla may have missed. Instead, they are charging ahead in the chip development business, a new market segment for all of them. What may seem foolhardy to some industry watchers could be a stroke of genius as their development groups design higher performing, power-efficient computer chips for their specific networking, cloud, automotive and other applications.

To do so, they are hiring experienced, seasoned designers who know the ropes. Whether intentional or not, they are focusing on a development group’s core competencies (aka “playing to your strength”) and outsourcing the rest, a sound strategic business decision. 

Read More.

Filed Under: Geen categorie

7 October 2021

Homegrown EDA Tools, Open Source, Starting an EDA Company: Verific on Chip Design Trends

Alameda, Calif.-based Verific Design Automation, a member of the ESD Alliance, made its name in the electronic system design and semiconductor industry supporting companies ranging from startups to billion-dollar industry leaders such as Synopsys, Cadence, Siemens EDA, Xilinx, Microchip, NVidia, Infineon, Qualcomm, Renesas and Samsung. Its software is used as the front end to design automation tools such as synthesis, simulation, debug, and formal verification.

I spoke with Verific president and COO Michiel Ligthart about homegrown and open-source EDA tools and other recent trends in chip design.

Read more.

Filed Under: Geen categorie

29 September 2021

Differentiation Through the Chip Design and Verification Flow

By Rick Carlson, Verific Design Automation

The makeup of the semiconductor industry is evolving and expanding once again. This time it’s a variety of companies, including tech giants Apple, Amazon, Facebook, Microsoft and Tesla, not known previously to be in the chip development business, instigating the change. They are hiring experienced engineers to design better performing, power-efficient computer chips for all kinds of applications, from networking and cloud to autonomous driving. Along the way, they are ripping up the pages of the traditional semiconductor playbook and putting in place their own individual guides to semiconductor design. The result is custom-made chips rather than using a generic chip to fit their requirements.

Read More.

Filed Under: Geen categorie

  • 1
  • 2
  • 3
  • …
  • 7
  • Next Page »

Design Automation Conference

Rick Carlson at DAC 2017
Interview with Rick Carlson, VP of Sales, at DAC 2018

DAC interview video
Interview with Rob Dekker at DAC 2016

Save

Save

Free 30-day Evaluation Package
Click here for our free Evaluation Package

PDF Downloads
Datasheets, white papers and blogs

Viper
Online defect and enhancement tracking

Documentation
Online documentation

FAQs
Q and A on Verific APIs and more

Verific Design Automation, Inc.
Please call (+1) 510-522-1555
Or email us at info@verific.com

© Copyright 2000–2022 • Verific Design Automation. All Rights Reserved