News - Verific Design Automation

9 March 2016

Verific’s board member Bob Gardner honored with DATE fellow award

Robert Gardner, longtime member of the Verific Design Automation Board of Directors, will be presented with the yearly DATE Fellow Award by the Design, Automation and Test in Europe (DATE) Conference and Exhibit 2016.

He will receive the prestigious award in recognition of his long association and support of DATE during the Opening Ceremonies March 15.
Read more at finance.yahooc.om

14 January 2016

UPF 3.0 is Now Official

The new UPF 3.0 standard offers additional enhancements to address and describe power intent of complex systems on chip (SoCs).
Read more at eetimes.com

20 October 2015

Verific Design Integrated with Tortuga Logic’s Hardware Security Tools

Tortuga Logic, transforming the way hardware designers and system architects test the security of hardware design, has licensed the Parser Platform from Verific Design Automation, the recognized leader of SystemVerilog, VHDL and UPF parsers used throughout the semiconductor industry.
Read more

14 July 2015

Vtool Relies on Verific Parsers to Drive Disruptive, Functional Verification Platform

Verific Design Automation, recognized as the leading supplier of hardware description language (HDL) parsers used throughout the semiconductor industry, today announced electronic design automation (EDA) newcomer Vtool has chosen Verific’s parsers for use with its functional verification platform.
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15 May 2015

Invionics Unveils VRDM for Rapid Deployment of Verific’s Parsers

Invionics, a company providing software to accelerate integrated circuit (IC) development and design automation, today took the wraps off the VRDM Development Platform that layers a rapid development interface on top of Verific’s industry-standard, IEEE-compliant SystemVerilog and VHDL parsers.

21 March 2015

So-ADE Unveils Debugger for Use With Verific Design Automation’s SystemVerilog, VHDL, UPF Parser Platforms

“We’re delighted that So-ADE founders created a product around our parser platform, and they have our full support,” notes Michiel Ligthart, Verific’s president and chief operating officer.

Today’s announcement reinforces Verific’s reach into a wide variety of verification segments, including analysis, emulation, simulation and synthesis.
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11 February 2015

Rocketick Renews Parser Platform License

Verific Design Automation, provider of SystemVerilog, VHDL and UPF parsers, today announced Rocketick Technologies Ltd., a leading provider of Verilog simulation acceleration solutions for chip verification, has renewed its license for Verific’s SystemVerilog Parser Platform.

“Verific has been an outstanding partner,” adds Uri Tal, Rocketick’s chief executive officer. “Its software is high quality, as is the support and service. I can’t think of a more responsive and supportive EDA vendor.”
Read more

20 January 2015

Verific Design Automation Closes Fifth Consecutive Year of Growth

Verific Design Automation, provider of SystemVerilog, VHDL and UPF parsers, finished its fifth consecutive year of growth with a double-digit increase in revenue.
Read more at finance.yahoo.com

17 September 2014

Q&A with Verific’s Rob Dekker on Parsers, Elaborators

Rob Dekker’s involvement in logic synthesis technology spans more than 20 years. He’s developed a thriving business selling register-transfer-level (RTL) parsers and elaborators to companies offering commercial EDA tools and electronics companies implementing or upgrading their design flows. I spoke with him about trends in the electronics area. Read more at electronicdesign.com

29 August 2014

Exploiting Verific tools at the right abstraction level

Verific Design Automation specializes in Verilog, VHDL and SystemVerilog language processing sub-systems. Its users develop software where Verific-based technology serves as the front end for a wide range of EDA and FPGA design tools. These tools are used during analysis, simulation, verification, synthesis, emulation and test.

This article discusses the use of Verific technology by our team at the Really Useful Software and Hardware Company. We hope these experiences will be of use to the many other Verific users out there and we also describe our own efforts to extend the technology with a series of ‘apps’ addressing common tool developer issues.