ANSYS Semiconductor’s Vic Kulkarni, who serves as its vice president and chief strategist, offers a fitting tribute to Verific. “Verific goes the extra mile and provides solutions head and shoulders above others.”
- Part 1: Fierce Loyalty to Verific’s Value
- Part 2: Marrying Expertise to Avoid Redoing What’s Already Been Done
- Part 3: The Silent Partner
- Part 4: Good Partnership on All Levels
- Part 5: Going the Extra Mile
- Part 6: Verific’s Value Explained
Going the Extra Mile
“Verific has been a great partner that goes beyond just being a vendor,” says Vic Kulkarni. “I see a unique customer/vendor relationship with Michiel and Rob that we have had from the day I met them. I like their attitude, their mission statement and the metaphor of the giraffe logo for being tall with a view of its surroundings/customers.”
According to Vic, Verific’s support has been crucial to both ANSYS and its worldwide users. It provides easy direct access to its R&D team and is open to collaborations to improve capabilities and efficiency. Because parsing the HDL design description is the first step in RTL power analysis and reduction using PowerArtist, any issues that ANSYS users encounter need to be resolved in short order, something Verific well understands.
Verific HDL parsers are robust, high quality and rich in features, he notes. On multiple occasions, ANSYS found the additional functionality it wanted already existed in Verific’s products. “By being customer focused, it is responsive to questions or requests. It supports older versions of the parsers when our end users are not able to migrate quickly to newer versions. Over the years, Verific has provided customized solutions incorporated in PowerArtist.”
Since the Verific source code is integrated into PowerArtist, ANSYS has an advantage for getting bug fixes quickly from Verific experts for any code changes. At the same time, any customized fixes or enhancements by PowerArtist R&D can be incorporated in the Verific code. As parser and language reference manual (LRM) experts, the Verific R&D team readily provides insights on HDL constructs and its syntax/semantics.
“In this business, both partners must be well aligned to meet the goals of common customers. The specific code areas for our needs are maintained regularly, something we do not expect from other vendors and is a key to our ability to respond to the ever-changing front-end languages. In our normal product release cycle, the Verific major release is integrated in PowerArtist twice a year. The release goes through the pre-qualification with standalone Verific binary run, qualification and QA qualification stages as different metrics get checked off before integration in the PowerArtist code stream. The major Verific release includes bug fixes reported by PowerArtist along with fixes reported by other Verific customers.
“We are currently in the process of adding functionality to the PowerArtist GUI, enabling visibility into specific blocks of RTL text that define design elements and enhance power-reduction opportunities. Our partnership with Verific allows us to provide the reduction opportunities directly into its source.
“Verific is user focused and responsive to questions or requests coming from the PowerArtist team. Overall, the response from Verific has been timely, mostly within 24 hours of a bug report. On behalf of ANSYS Team, I wish Verific management and the team great success for years to come. Verific goes the extra mile and provides solutions head and shoulders above others.”
To learn more about Verific’s Parser Platform, send email to firstname.lastname@example.org or call (510) 522-1555.