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Archives for September 2014

17 September 2014

Q&A with Verific’s Rob Dekker on Parsers, Elaborators

Rob Dekker’s involvement in logic synthesis technology spans more than 20 years. He’s developed a thriving business selling register-transfer-level (RTL) parsers and elaborators to companies offering commercial EDA tools and electronics companies implementing or upgrading their design flows. I spoke with him about trends in the electronics area. Read more at electronicdesign.com

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Design Automation Conference

Rick Carlson at DAC 2017
Interview with Rick Carlson, VP of Sales, at DAC 2018

DAC interview video
Interview with Rob Dekker at DAC 2016

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