Verific is an unusual company. They are completely dominant in what they do – providing parsers for Verilog/SV, VHDL and UPF. Yet they have no ambition to expand beyond that goal. Instead, per Michiel Ligthart (President and COO), they continue to “sharpen the saw”. This is an expression I learned in sales training, habit #7 from 7 Habits of Highly Effective People. Constantly refining and polishing (or sharpening) the tools you already have rather than launching out into building new tools. That’s a great way to keep existing customers loyal and to steadily grow a business. They are still investing in interesting development, but it is all around these core tools.

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Verific Design Automation, the leading provider of SystemVerilog, Verilog, VHDL and UPF Parser Platforms, today announced Rapid Silicon, a provider of AI-enabled application-specific FPGAs based on open-source technology, is the newest licensee of its Parser Platform.

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To gain at least an 18 month advantage in getting a product to market, Verific Design Automation builds SystemVerilog, UPF and VHDL parser platforms which accelerates the production cycle because the RTL front end is immediately accepted by the semiconductor industry, says the company.

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Michiel Ligthart | President and COO | Verific Design Automation

Conventional career advice favors “playing to your strength,” guidance executives at Apple, Amazon, Facebook, Microsoft and Tesla may have missed. Instead, they are charging ahead in the chip development business, a new market segment for all of them. What may seem foolhardy to some industry watchers could be a stroke of genius as their development groups design higher performing, power-efficient computer chips for their specific networking, cloud, automotive and other applications.

To do so, they are hiring experienced, seasoned designers who know the ropes. Whether intentional or not, they are focusing on a development group’s core competencies (aka “playing to your strength”) and outsourcing the rest, a sound strategic business decision. 

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Alameda, Calif.-based Verific Design Automation, a member of the ESD Alliance, made its name in the electronic system design and semiconductor industry supporting companies ranging from startups to billion-dollar industry leaders such as Synopsys, Cadence, Siemens EDA, Xilinx, Microchip, NVidia, Infineon, Qualcomm, Renesas and Samsung. Its software is used as the front end to design automation tools such as synthesis, simulation, debug, and formal verification.

I spoke with Verific president and COO Michiel Ligthart about homegrown and open-source EDA tools and other recent trends in chip design.

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