Baum, a leader in power analysis solutions, today became the newest licensee of Verific Design Automation, the recognized leader of SystemVerilog, VHDL and UPF Parser Platforms in production and development use throughout the semiconductor industry.
Under terms of the agreement, Verific will acquire Invionics Software’s entire INVIO technology portfolio, for electronic design automation (EDA) tools and flows. An R&D group with real-world design experience and a deep understanding of EDA software development will join Verific’s engineering department.
Verific to Showcase Three Design Automation Startups With Safety-Features Insertion, Low-Power, Hardware Security Analysis Offerings in Its DAC Booth
Read more at finance.yahoo.com
The new UPF 3.0 standard offers additional enhancements to address and describe power intent of complex systems on chip (SoCs).
Read more at eetimes.com
Tortuga Logic, transforming the way hardware designers and system architects test the security of hardware design, has licensed the Parser Platform from Verific Design Automation, the recognized leader of SystemVerilog, VHDL and UPF parsers used throughout the semiconductor industry.